Inside this Business Group

The Data Center Group (DCG) is at the heart of Intel’s transformation from a PC company to a company that runs the cloud and billions of smart, connected computing devices. The data center is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies—spanning software, processors, storage, I/O, and networking solutions—that fuel cloud, communications, enterprise, and government data centers around the world.

Job Description

The candidate will work as a member of a verification team playing a leading role in developing Ethernet Network Interface Controller products. The responsibilities will include but not be limited to:

• Technical lead for a team of Verification engineers to ensure a consistent and comprehensive ability to test leading edge technology platforms
• Own IPSubsystem level validation
• Development of testplans testbench BFMs checkers trackers scoreboard and functional coverage
• Working closely with design engineers microarchitects and other team members to ensure high quality of testplans verification environment and tests
• Strong discipline and attention to detail in ensuring effective high quality verification that minimizes bug escapes to higher levels of validation
• Participation in system integration and verification in cooperation with system engineering and development teams to conduct integration bring up activities on platforms
• Drive practices for verification code func coverage RTL code coverage reviews and provide feedback across the project
• Give proactive feedback to management on metrics and knowledge gathered during execution and post execution analysis Signoff verification activities and close test plans along with the team
• Define implement and deploy verification capabilities methodologies and process improvements
• Lead and participate in pathfinding and efficiency activities Mentoring other team members on verification BKMs debug new technology

Qualifications

• BE/BTech 12 years or ME/MTech 10 years of relevant experience
• For manager position should have atleast 4 years of managerial experience with successful tapeins
• Expertise in System Verilog language with strong background in developing verification infrastructures and test strategies
• Strong knowledge of verification methodologies such as OVM UVM and functional coverage development analysis
• Strong experience with architecting optimized verification environments experience with cluster and fullchip
• System level testing and debug Apart from simulation should have work experience with at least one other verification aspect like
• Performance modeling Formal verification Gate Level verification Emulation etc
• Strong knowledge of IP Cluster and Chip Level Test writing working with multiple Validation disciplines Arch Emulation PostSilicon and Software
• Very good knowledge of a vertical networking or connectivity technology or protocol Eg PCIE Ethernet Packet Processing RDMA Memory Controller etc
• Must demonstrate strong initiative teamwork planning and communication abilities as heshe will be driving new verification capabilities and requirements impacting multiple projects
• Excellent verbal and written communications skills as well as ability to be results oriented in a team environment